Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - vhdl testbench

Search list

[VHDL-FPGA-Verilog] generic_fifo

Description: 这是从opencores下的fifo代码,包括了异步和同步的,还有写的testbench,希望对大家有用.-This is opencores fifo under the code, including asynchronous and synchronous. There testbench written in the hope that useful for all.
Platform: | Size: 20480 | Author: daiowen | Hits:

[VHDL-FPGA-Verilog] wave_gen

Description: 波形发生器，带TESTBENCH， 多平台 -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn -waveform generator, with TESTBENCH. Multi-platform-- the design makes use of the new shift opera tors available in the VHDL-93 std-- this design passes the Synplify synthesis check-- downloa d from : www.fpga.com.cn
Platform: | Size: 1024 | Author: 罗兰 | Hits:

[VHDL-FPGA-Verilog] simplevhdl

Description: 我是VHDL的初学者，这是我自己编译的简单的几个VHDL码，功能有3-8解码器及其testbench,16位寄存器及其testbench和交通灯。 希望能和其他初学者一起讨论学习，并得到高手的指点-I VHDL beginners, this is my own translation of a few simple VHDL code. 3-8 function decoder and testbench, 16 Register and testbench and traffic lights. Hopes to be able to discuss other beginners learning, and with the guidance of the master
Platform: | Size: 4096 | Author: yvonne | Hits:

[VHDL-FPGA-Verilog] iictestbench

Description: vhdl写的完整i2c代码,有仿真文件,是清华的人写的,质量可靠,请大家交流,qq:398087764-vhdl the integrity i2c write code, simulation document, the writers of Qinghua, reliable quality, Please exchange qq : 398087764
Platform: | Size: 214016 | Author: sunwei | Hits:

[VHDL-FPGA-Verilog] ModelSim_TestBench_VHDL

Description: ModelSim TestBench的VHDL模版-ModelSim VHDL template TestBench
Platform: | Size: 1024 | Author: 汤维 | Hits:

[Books] VHDL_TESTBENCH

Description: 怎样用VHDL写TESTBENCH.rar VHDL仿真-how to use VHDL to write VHDL simulation TESTBENCH.rar
Platform: | Size: 9594880 | Author: 高 | Hits:

[VHDL-FPGA-Verilog] core_arm.tar

Description: vhdl的arm核 包含testbench-VHDL Testbench contain the nuclear arm
Platform: | Size: 666624 | Author: dc | Hits:

[VHDL-FPGA-Verilog] counter

Description: VHDL计数器的TestBench，适合初学者-VHDL counter TestBench, suitable for beginners
Platform: | Size: 1024 | Author: hbsun | Hits:

[VHDL-FPGA-Verilog] WritingTestbenches

Description: 编写testbench的超好教程，网上这种资料比较少。(Kluwer) Writing Testbenches--Functional Verification of HDL Models.pdf-Testbench prepared super good tutorials, on-line this information is relatively small. (Kluwer) Writing Testbenches Functional Verification of HDL Models.pdf
Platform: | Size: 4112384 | Author: 文成 | Hits:

[Crack Hack] test_bench_top

Description: 用于AES加密的testbench。产生激励-AES encryption for testbench. Incentive
Platform: | Size: 10240 | Author: zsh | Hits:

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[Other] Verilogtestbench

Description: Writing Testbenches classic book in verilog testbench-Writing Testbenchesclassic book in verilog testbench
Platform: | Size: 57344 | Author: dan | Hits:

[ARM-PowerPC-ColdFire-MIPS] risc

Description: 嵌入式risc处理器源码，包含设计文档，原理图，testbench，及外围接口，使用verilog实现。-Source embedded RISC processors, including design documents, schematics, testbench, and peripheral interfaces, the use of Verilog to achieve.
Platform: | Size: 129024 | Author: 李林 | Hits:

[VHDL-FPGA-Verilog] adder4

Description: 是用verilog写得加法器以及计数器里面有测试文件（testbench），对于初学者来说这个可以用来参考下-Is written in Verilog adder and counter inside a test file (testbench), for beginners this can be used to reference the next
Platform: | Size: 1024 | Author: olive | Hits:

[SCM] 8051_IP_Verilog

Description: 8051单片机源码verilog版本 包括rtl， testbench， synthesis -Verilog source code version of 8051, including rtl, testbench, synthesis
Platform: | Size: 508928 | Author: carol | Hits:

[VHDL-FPGA-Verilog] spi2-testbench

Description: test bench for spi communication
Platform: | Size: 1024 | Author: Onur | Hits:

[VHDL-FPGA-Verilog] generic_testbench

Description: VHDL中关于generic的用法，及其testbench，可以使用Modelsim仿真查看其功能-the usage of generic,a testbench file is given, we can use it to simulate the generic s function
Platform: | Size: 2048 | Author: xietianjiao | Hits:

[VHDL-FPGA-Verilog] vhdltestbench

Description: testbench,VHDL的，适合初学者使用-testbench
Platform: | Size: 321536 | Author: liushuai | Hits:

[VHDL-FPGA-Verilog] testbench

Description: 关于如何写Verilog测试台的文档，对于测试程序很有帮助噢-On how to write Verilog test documents, test procedures for helpful Oh
Platform: | Size: 197632 | Author: 丽 | Hits:

[VHDL-FPGA-Verilog] shiftregister

Description: Shift Register. VHDL code and its testbench.
Platform: | Size: 1024 | Author: mehmet | Hits:
« 1 23 4 5 6 7 8 9 10 ... 14 »

CodeBus www.codebus.net